Meeting notes: Difference between revisions
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(Created page with "== September 30, 2010 == Current progress: * We can get accounts on the PNNL XMT; Simon sent out an email. * An XMT simulator is also available. * Simon created a wiki for the p...") |
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* An XMT simulator is also available. | * An XMT simulator is also available. | ||
* Simon created a wiki for the project and sent account details to everybody. | * Simon created a wiki for the project and sent account details to everybody. | ||
* Simon has been trying to get details of applications from various people, but has not yet been successful. Graph connectivity is the basic area. There is an effort to create a graph benchmark: http://www.graph500.org/ | * Simon has been trying to get details of applications from various people, but has not yet been successful. Graph connectivity is the basic area. There is an effort to create a graph benchmark: http://www.graph500.org/, with source [[graph 500 git repository]] | ||
Thoughts on methodology: | Thoughts on methodology: | ||
Revision as of 15:56, 1 October 2010
September 30, 2010
Current progress:
- We can get accounts on the PNNL XMT; Simon sent out an email.
- An XMT simulator is also available.
- Simon created a wiki for the project and sent account details to everybody.
- Simon has been trying to get details of applications from various people, but has not yet been successful. Graph connectivity is the basic area. There is an effort to create a graph benchmark: http://www.graph500.org/, with source graph 500 git repository
Thoughts on methodology:
- We should target an abstract model, not the real ISA.
- We will focus on performance for a single node for now.
- It may be possible to modify processor microcode. Could that be useful?
- Some questions we're interested in exploring:
- How many thread contexts can we run concurrently on a modern Xeon before memory performance degrades?
- What resource constraints in existing processors limit our performance?
- Could we take a trace of memory operations, filter out stack references, and replay these into a simple architectural simulator to explore what resources are necessary to get performance?
We'll explore a couple angles immediately:
- look at green threads packages: Andrew is doing this already.
- look at applications/benchmarks: Jacob will start here.
- look at resource constraints in Intel and Arm (maybe AMD): Brandon is looking into this.
